A little over a year ago (I'm writing this on 2/15/2024, so this must be 2023 or 2022), I started learning about how to "decap"
the chips from integrated circuits using a method that I found on YouTube. The method is to use a hot air gun to heat up the IC
and then, as the YouTuber put it, it will "break like a bar of chocolate." If you hold the IC just right with a couple pairs of
pliers, the crack will go over the center of the chip, and it will fall right out of the plastic casing. At this point, you just
yank the little wires from the pins and you're left with a little silicon wafer full of thin shiny traces.
I've recently been learning about methods for analyzing thin films using EPMA, so I think this sample may provide a good test
case to develop these methods.
As I understand it, thin films are analyzed using point analyses. It's clear from looking at the IC briefly that there are traces
going all over the place, and it's not immediately clear to me what they are made of or which ones might be detectable within the
analytical volume of an analysis and which are too deep to detect below the surface. The first thing to try will probably be mapping
the sample using WDS over whatever area that time permits. However, I need to figure out which elements to map first.
WDS maps were collected over approximately 5 hours with the spectrometer confguration listed below. The map resolution was
constrained by a 100 ms dwell time needed to detect the Cu Ka1 peak using 30 kV and a 100 nA beam, a 1 micron pixel step size, and
my desire to finish the maps by 5 pm. In retrospect, this time constraint never made any sense, and at the time of writing, I've
started an over-the-weekend map of the whole sample.
After a relatively fast map of the chip (above), I decided to try mappng the whole thing over the weekend. Because of the
high dwell time needed to see Cu at my chosen beam power (100 nA?), I would only be able to get a 3-micron-wide pixel
in a 60-hour time interval.